The present invention relates generally to methods for testing electronic systems, and more particularly, to an architectural equation generating algorithm or method for testing whether a system that is hierarchically built from smaller blocks correctly implements a desired equation.
The standard method used for verifying that a system that is hierarchically built from smaller blocks correctly implements a desired equation is to simulate numeric test vectors through the system. There are several shortcomings to this approach. First, for even very small simple systems, it is practically impossible to exhaustively simulate all possible inputs to the system. Second, if a particular test vector input to the system produces an incorrect output, it is difficult to use this incorrect output to pinpoint the error in the design.
Accordingly, it is an objective of the present invention to provide for an architectural equation generating algorithm or method for testing whether a system that is built hierarchically from smaller blocks correctly implements a desired equation.